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1/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. operational amplifiers / comparators ultra low power cmos operational amplifiers bu7265g,bu7265sg,bu7 205hfv,bu7205shfv,bu7271g,bu7271sg, BU7245HFV,bu7245shfv,bu7411g, bu7411sg,bu7421g,bu7421sg, bu7475hfv,bu7475shfv description ultra low power cmos op-amp bu7265/bu7205/bu7271/bu7245 family (input-output full swing) and bu7411 / bu7421 / bu7475 (ground sense) are monolithic ic. supply curr ent is very small (bu7265/bu7411 family: 0.35[ a], bu7421 family: 8.5[ a], bu7271 family: 8.6[ a]), and vdd range is +1.6[v] ~ +5.5[v] (bu7411 family: single supply), so operable with low voltage. it?s suitable for applications of portable equipments and battery movements. features 1) ultra low power 0.35[ a] : bu7265 family : bu7411 family 8.5[ a] : bu7421 family 8.6[ a] : bu7271 family 2) high large signal voltage gain 3) wide temperature range -40[ ] ~ +85[ ] (bu7265g,bu7271g,bu7411g,bu7421g) (bu7205hfv,BU7245HFV,bu7475hfv) -40[ ] ~ +105[ ] (bu7265sg,bu7271sg,bu7411sg,bu7421sg) (bu7205shfv,bu7245shfv,bu7475shfv) 4) low input bias current 1[pa] (typ.) 5) internal esd protection human body model (hbm) 4000 [v] (typ.) 6) internal phase compensation 7) low operating supply voltage +1.8[v] ~ +5.5[v ] (single supply) (bu7265 family, bu7271 family) (bu7205 family, bu7245 family) +1.7[v] ~ +5.5[v ] (single supply) (bu7421 family, bu7475 family) +1.6[v] ~ +5.5[v ] (single supply) (bu7411 family) no.10049eat19 input-output full swing ground sense ultra low power low power ultra low power low power single single single single bu7265g bu7271g bu7411g bu7421g bu7205hfv BU7245HFV bu7475hfv (bu7265sg: operation guaranteed up to +105 ) (bu7271sg: operation guaranteed up to +105 ) (bu7411sg: operation guaranteed up to +105 ) (bu7421sg: operation guaranteed up to +105 ) (bu7205shfv: operation guaranteed up to +105 ) (bu7245shfv: operation guaranteed up to +105 ) (bu7475shfv: operation guaranteed up to +105 )
technical note 2/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv pin assignments input type package input type package ssop5 hvsof5 ssop5 hvsof5 input-output full swing bu7265g bu7265sg bu7271g bu7271sg bu7205hfv bu7205shfv BU7245HFV bu7245shfv ground sense bu7411g bu7411sg bu7421g bu7421sg bu7475hfv bu7475shfv absolute maxi mum ratings (ta=25[ ]) parameter symbol ratings unit bu7265g, bu7411g bu7271g, bu7421g bu7205hfv, BU7245HFV bu7475hfv bu7265sg, bu7411sg bu7271sg, bu7421sg bu7205shfv, bu7245shfv bu7475shfv supply voltage vdd-vss +7 v differential input voltage (*1) vid vdd-vss v input common-mode voltage range vicm (vss-0.3) ~ vdd+0.3 v operating temperature topr -40 ~ +85 -40 ~ +105 storage temperature tstg -55 ~ +125 maximum junction temperature tjmax +125 note: absolute maximum rating item indicates the condition which must not be exceeded. application of voltage in excess of abs olute maximum rating or use out absolute maximum rated temperature env ironment may cause deterioration of characteristics. (*1) the voltage difference between inverting input and non-inverting input is the differential input voltage. then input terminal voltage is set to more than vss. 1 2 5 4 3 in+ vss out in- vdd + - ssop5 hvsof5
technical note 3/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv electrical characteristics: input-output full swing bu7265 family (unless otherwise specified vdd=+3[v], vss=0[v], ta=25[ ]) parameter symbol temperature range limits unit condition bu7265g, bu7265sg min. typ. max. input offset voltage (*2) vio 25 - 1 8.5 mv vdd=1.8 ~ 5.5[v], vout=vdd/2 input offset current (*2) iio 25 - 1 - pa input bias current (*2) ib 25 - 1 - pa supply current (*3) idd 25 - 0.35 0.9 a rl= , av=0[db], vin=1.5[v] full range - - 1.3 high level output voltage voh 25 vdd-0.1 - - v rl=10[k ? ] low level output voltage vol 25 - - vss+0.1 v rl=10[k ? ] large signal voltage gain av 25 60 95 - db rl=10[k ? ] input common-mode voltage range vicm 25 0 - 3 v vdd-vss=3[v] common-mode rejection ratio cmrr 25 45 60 - db power supply rejection ratio psrr 25 60 80 - db output source current (*4) ioh 25 1 2.4 - ma vdd-0.4[v] output sink current (*4) iol 25 2 4 - ma vss+0.4[v] slew rate sr 25 - 2.4 - v/ms cl=25[pf] gain band width ft 25 - 4 - khz cl=25[pf], av=40[db] phase margin 25 - 60 - cl=25[pf], av=40[db] (*2) absolute value (*3) full range bu7265: ta=-40[ ]~+85[ ] bu7265s: ta=-40[ ]~+105[ ] (*4) under the high temperature environment, consider the po wer dissipation of ic when selecting the output current. when the terminal short circuits are continuously output, the ou tput current is reduced to clim b to the temperature inside ic. bu7271 family (unless otherwise specified vdd=+3[v], vss=0[v], ta=25[ ]) parameter symbol temperature range limits unit condition bu7271g, bu7271sg min. typ. max. input offset voltage (*5) vio 25 - 1 8 mv vdd=1.8 ~ 5.5[v], vout=vdd/2 input offset current (*5) iio 25 - 1 - pa input bias current (*5) ib 25 - 1 - pa supply current (*6) idd 25 - 8.6 17 a rl= , av=0[db], vin=1.5[v] full range - - 25 high level output voltage voh 25 vdd-0.1 - - v rl=10[k ? ] low level output voltage vol 25 - - vss+0.1 v rl=10[k ? ] large signal voltage gain av 25 70 100 - db rl=10[k ? ] input common-mode voltage range vicm 25 0 - 3 v vdd-vss=3[v] common-mode rejection ratio cmrr 25 45 60 - db power supply rejection ratio psrr 25 60 80 - db output source current (*7) ioh 25 2 4 - ma vdd-0.4[v] output sink current (*7) iol 25 4 8 - ma vss+0.4[v] slew rate sr 25 - 50 - v/ms cl=25[pf] gain band width ft 25 - 90 - khz cl=25[pf], av=40[db] phase margin 25 - 60 - cl=25[pf], av=40[db] (*5) absolute value (*6) full range bu7271: ta=-40[ ]~+85[ ] bu7271s: ta=-40[ ]~+105[ ] (*7) under the high temperature environment, consider the po wer dissipation of ic when selecting the output current. when the terminal short circuits are continuously output, the ou tput current is reduced to clim b to the temperature inside ic.
technical note 4/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv bu7205 family,(unless otherwise specified vdd=+3[v], vss=0[v], ta=25[ ]) parameter symbol temperature range limits unit condition bu7205hfv, bu7205shfv min. typ. max. input offset voltage (*8) vio 25 - 1 9.5 mv vdd=1.8 ~ 5.5[v], vout=vdd/2 input offset current (*8) iio 25 - 1 - pa input bias current (*8) ib 25 - 1 - pa supply current (*9) idd 25 - 0.4 0.95 a rl= , av=0[db], vin=1.5[v] full range - - 1.2 high level output voltage voh 25 vdd-0.1 - - v rl=10[k ? ] low level output voltage vol 25 - - vss+0.1 v rl=10[k ? ] large signal voltage gain av 25 60 95 - db rl=10[k ? ] input common-mode voltage range vicm 25 0 - 3 v vdd-vss=3[v] common-mode rejection ratio cmrr 25 45 60 - db power supply rejection ratio psrr 25 60 80 - db output source current (*10) ioh 25 0.5 1.2 - ma vdd-0.4[v] output sink current (*10) iol 25 1 2 - ma vss+0.4[v] slew rate sr 25 - 2.5 - v/ms cl=25[pf] gain band width ft 25 - 2.5 - khz cl=25[pf], av=40[db] phase margin 25 - 60 - cl=25[pf], av=40[db] (*8) absolute value (*9) full range bu7205: ta=-40[ ]~+85[ ] bu7205s: ta=-40[ ]~+105[ ] (*10) under the high temperature environment, consider the po wer dissipation of ic when selecting the output current. when the terminal short circuits are continuously output, the ou tput current is reduced to clim b to the temperature inside ic. bu7245 family (unless otherwise specified vdd=+3[v], vss=0[v], ta=25[ ]) parameter symbol temperature range limits unit condition BU7245HFV, bu7245shfv min. typ. max. input offset voltage (*11) vio 25 - 1 8.5 mv vdd=1.8 ~ 5.5[v], vout=vdd/2 input offset current (*11) iio 25 - 1 - pa input bias current (*11) ib 25 - 1 - pa supply current (*12) idd 25 - 5.0 12 a rl= , av=0[db], vin=1.5[v] full range - - 20 high level output voltage voh 25 vdd-0.1 - - v rl=10[k ? ] low level output voltage vol 25 - - vss+0.1 v rl=10[k ? ] large signal voltage gain av 25 60 95 - db rl=10[k ? ] input common-mode voltage range vicm 25 0 - 3 v vdd-vss=3[v] common-mode rejection ratio cmrr 25 45 60 - db power supply rejection ratio psrr 25 60 80 - db output source current (*13) ioh 25 2 4 - ma vdd-0.4[v] output sink current (*13) iol 25 4 8 - ma vss+0.4[v] slew rate sr 25 - 35 - v/ms cl=25[pf] gain band width ft 25 - 70 - khz cl=25[pf], av=40[db] phase margin 25 - 60 - cl=25[pf], av=40[db] (*11) absolute value (*12) full range bu7245: ta=-40[ ]~+85[ ] bu7245s: ta=-40[ ]~+105[ ] (*13) under the high temperature environment, consider the po wer dissipation of ic when selecting the output current. when the terminal short circuits are continuously output, the ou tput current is reduced to clim b to the temperature inside ic.
technical note 5/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv electrical characteristics: ground sense bu7411 family,(unless otherwise specified vdd=+3[v], vss=0[v], ta=25[ ]) parameter symbol temperature range limits unit condition bu7411g, bu7411sg min. typ. max. input offset voltage (*14) vio 25 - 1 8 mv vdd=1.6 ~ 5.5[v], vout=vdd/2 input offset current (*14) iio 25 - 1 - pa input bias current (*14) ib 25 - 1 - pa supply current (*15) idd 25 - 0.35 0.8 a rl= , av=0[db], vin=1.0[v] full range - - 1.3 high level output voltage voh 25 vdd-0.1 - - v rl=10[k ? ] low level output voltage vol 25 - - vss+0.1 v rl=10[k ? ] large signal voltage gain av 25 60 95 - db rl=10[k ? ] input common-mode voltage range vicm 25 0 - 2 v vss ~ vdd-1.0[v] common-mode rejection ratio cmrr 25 45 60 - db power supply rejection ratio psrr 25 60 80 - db output source current (*16) ioh 25 1 2.4 - ma vdd-0.4[v] output sink current (*16) iol 25 2 4 - ma vss+0.4[v] slew rate sr 25 - 2.4 - v/ms cl=25[pf] gain band width ft 25 - 4 - khz cl=25[pf], av=40[db] phase margin 25 - 60 - cl=25[pf], av=40[db] (*14) absolute value (*15) full range bu7411: ta=-40[ ]~+85[ ] bu7411s: ta=-40[ ]~+105[ ] (*16) under the high temperature environment, consider the po wer dissipation of ic when selecting the output current. when the terminal short circuits are continuously output, the ou tput current is reduced to clim b to the temperature inside ic. bu7421 family (unless otherwise specified vdd=+3[v], vss=0[v], ta=25[ ]) parameter symbol temperature range limits unit condition bu7421g, bu7421sg min. typ. max. input offset voltage (*17) vio 25 - 1 6 mv vdd=1.7 ~ 5.5[v], vout=vdd/2 input offset current (*17) iio 25 - 1 - pa input bias current (*17) ib 25 - 1 - pa supply current (*18) idd 25 - 8.5 17 a rl= , av=0[db], vin=0.9[v] full range - - 25 high level output voltage voh 25 vdd-0.1 - - v rl=10[k ? ] low level output voltage vol 25 - - vss+0.1 v rl=10[k ? ] large signal voltage gain av 25 70 100 - db rl=10[k ? ] input common-mode voltage range vicm 25 0 - 1.8 v vss ~ vdd-1.2[v] common-mode rejection ratio cmrr 25 45 60 - db power supply rejection ratio psrr 25 60 80 - db output source current (*19) ioh 25 2 4 - ma vdd-0.4[v] output sink current (*19) iol 25 4 8 - ma vss+0.4[v] slew rate sr 25 - 50 - v/ms cl=25[pf] gain band width ft 25 - 90 - khz cl=25[pf], av=40[db] phase margin 25 - 60 - cl=25[pf], av=40[db] (*17) absolute value (*18) full range bu7421: ta=-40[ ]~+85[ ] bu7421s: ta=-40[ ]~+105[ ] (*19) under the high temperature environment, consider the po wer dissipation of ic when selecting the output current. when the terminal short circuits are continuously output, the ou tput current is reduced to clim b to the temperature inside ic.
technical note 6/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv bu7475 family(unless otherwise specified vdd=+3[v], vss=0[v], ta=25[ ]) parameter symbol temperature range limits unit condition bu7475hfv,bu7475shfv min. typ. max. input offset voltage (*20) vio 25 - 1 6.5 mv vdd=1.7 ~ 5.5[v], vout=vdd/2 input offset current (*20) iio 25 - 1 - pa - input ias current (*20) ib 25 - 1 - pa - supply current (*21) idd 25 - 9 18 a rl= , av=0[db] vin=0.9[v] full range - - 28 high level output voltage voh 25 vdd-0.1 - - v rl=10[k ? ] low level output voltage vol 25 - - vss+0.1 v rl=10[k ? ] large signal voltage gain av 25 60 100 - db rl=10[k ? ] input common-mode voltage range vicm 25 0 - 1.8 v vss~vdd-1.2[v] common-mode rejection ratio cmrr 25 45 60 - db - power supply rejection ratio psrr 25 60 80 - db - output source current (*22) ioh 25 4 7 - ma vdd-0.4[v] output sink current (*22) iol 25 9 14 - ma vss+0.4[v] slew rate sr 25 - 50 - v/ms cl=25[pf] gain band width ft 25 - 100 - khz cl=25[pf], av=40[db] phase margin 25 - 60 - cl=25[pf], av=40[db] (*20) absolute value (*21) full range bu7475: ta=-40[ ]~+85[ ] bu7475s: ta=-40[ ]~+105[ ] (*22) under the high temperature environment, consider the po wer dissipation of ic when selecting the output current. when the terminal short circuits are continuously output, the ou tput current is reduced to clim b to the temperature inside ic.
technical note 7/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv 0 2 4 6 8 10 -60 -30 0 3 0 60 9 0 120 a mbi ent te mpe ra ture [ ] output source current [ma] output source current ?ambient temperature (vout=vdd-0.4[v]) 0 5 10 15 20 123456 supply vol tage [ v] output voltage low [mv] 0 5 10 15 20 -60-30 0 30 60 90120 a mbi ent temp era ture [ ] output sink current [ma] 0 5 10 15 20 0.00.51.01.52.02.53.0 output vo ltage [v] output sink current [ma] reference data bu7265 family (*)the above data is ability value of sample, it is not guaranteed. bu7265g: -40[ ] ~ +85[ ] bu7265sg: -40[ ] ~ +105[ ] fig.1 fig.2 fig.3 0 2 4 6 8 10 0.00.51.01.52.02.5 3.0 output vol ta ge [ v] output source current [ma] output sink current ? ambient temperature (vout=vss+0.4[v]) output sink current ? output voltage (vdd=3[v]) 0 0.2 0.4 0.6 0.8 123456 supp ly v oltage [v] supply current [ a] 0 200 400 600 800 0 5 0 100 15 0 amb ient temp erature [ ] power dissip ation [mw] . 0 200 400 600 800 050100150 amb ient temp erature [ ] power dissip ation [mw] . 0 1 2 3 4 5 6 123456 supp ly v oltage [v] output vol tage high [ v] output voltage low ? supply voltage (rl=10[k ? ]) -40 25 85 bu7265 famil y 105 5.5v 1.8v 3.0v bu7265 famil y -40 25 85 105 bu7265 family supply current ? supply voltage 0 0. 2 0. 4 0. 6 0. 8 -60 -30 0 30 60 90 120 ambient temperature [ ] supply current [ a] 1.8v 5.5v 3.0v supply current ? ambient temperature bu7265 famil y -40 25 85 105 bu7265 famil y output voltage high ? supply voltage (rl=10[k ? ]) 0 1 2 3 4 5 6 -60 -30 0 30 60 90 120 ambient temperature [ ] output voltag e high [v ] 1.8v 5.5v 3.0v output voltage high ? ambient temperature (rl=10[k ? ]) bu7265 famil y 0 5 10 15 20 -60-30 0 30 60 90120 ambient temperature [ ] o utput vo ltage low [mv] 1.8v 5.5v 3.0v output voltage low ? ambient temperature (rl=10[k ? ]) bu7265 famil y -40 25 85 105 bu7265 family derating curve bu7265g 85 bu7265 famil y 105 bu7265 famil y derating curve bu7265sg 1.8v 5.5v 3.0v bu7265 family -40 25 85 105 output source current ? output voltage (vdd=3[v]) bu7265 family fig.4 fig.5 fig.6 fig.7 fig.8 fig.9 fig.10 fig.11 fig.12
technical note 8/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv 60 80 100 120 140 160 -60 -30 0 30 60 90 120 ambie nt te mpe rature [ ] l arge s ignal v oltag e gai n [db] -10.0 -7.5 -5.0 -2.5 0. 0 2. 5 5. 0 7. 5 10. 0 -60 -30 0 30 60 90 120 ambient temperature [ ] input offs et vol tage [mv ] 0 20 40 60 80 100 1. e+ 00 1.e+01 1 .e+02 1.e+ 03 1.e+04 1.e+05 1.e+06 frequency [hz] gai n[d b] 0 50 10 0 15 0 20 0 phas e [d eg] 0 20 40 60 80 100 120 123456 suppl y vol tage [v] common mode rejection ratio [db] 60 80 10 0 12 0 14 0 16 0 1234 56 s upp ly v oltag e [v] large signal volta ge ga in [db ] 0 20 40 60 80 100 120 140 -60-300306090120 ambient temperature [ ] p owe r s up ply re ject i on rat i o [db ] 0 20 40 60 80 100 120 -60-30 0 30 60 90120 ambie nt te mpe rature [ ] common mode rejection ratio [db] 0 1 2 3 4 5 -60-30 0 306090120 amb ient temperature [ ] slew rate l-h [v/ms] 0 1 2 3 4 5 -60 -30 0 30 60 90 120 amb ient temp erature [ ] slew rate h-l [v /ms] -10.0 -7 .5 -5 .0 -2 .5 0.0 2.5 5.0 7.5 10 .0 123456 s upp ly v oltag e [v] input offset v oltage [mv] -1 5 -1 0 -5 0 5 10 15 -10123 4 input vo ltage [v] i nput offse t volta ge [mv] bu7265 family (*)the above data is ability value of sample, it is not guaranteed. bu7265g: -40[ ] ~ +85[ ] bu7265sg: -40[ ] ~ +105[ ] fig.22 fig.23 common mode rejection ratio ? supply voltage (vdd=3[v]) -40 25 85 105 bu7265 famil y 40 25 85 105 bu7265 famil y large signal voltage gain ? supply voltage power supply rejection ratio ? ambient temperature bu7265 family 5.5v 1.8v 3.0v bu7265 famil y common mode rejection ? ambient temperature (vdd=3[v]) 5.5v 1.8v 3.0v slew rate l-h ? ambient temperature bu7265 famil y 5.5v 1.8v 3.0v bu7265 famil y slew rate h-l ? ambient temperature phase gain voltage gain frequency bu7265 family -40 25 85 105 bu7265 famil y input offset voltage ? supply voltage (vicm=vdd,vout=0.1[v]) 5.5v 1.8v 3.0v bu7265 family input offset voltage ? ambient temperature (vicm=vdd,vout=0.1[v]) input offset voltage ? input voltage (vdd=3[v]) large signal voltage gain ? ambient temperature bu7265 famil y 5.5v 1.8v 3.0v -40 25 85 105 bu7265 famil y fig.13 fig.14 fig.15 fig.16 fig.17 fig.18 fig.19 fig.20 fig.21
technical note 9/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv 0 5 10 15 20 -60-30 0 306090120 ambient temperature [ ] output source current [ma] 0 5 10 15 20 123456 supply vol ta ge [ v] output voltage low [mv] 0 10 20 30 40 -60-30 0 30 60 90120 a mbi ent temp era ture [ ] output sink current [ma] 0 5 10 15 20 25 30 35 40 0.00.51.01.52.02.53.0 output vo ltage [v] output sink current [ma] output source current ?ambient temperature (vout=vdd-0.4[v]) bu7271 family (*)the above data is ability value of sample, it is not guaranteed. bu7271g: -40[ ] ~ +85[ ] bu7271sg: -40[ ] ~ +105[ ] 0 5 10 15 20 0.0 0.5 1.0 1.5 2.0 2.5 3.0 output volta ge [ v] output source current [ma] 0 2 4 6 8 10 12 14 16 123456 supp ly v oltage [v] supp ly current [ a] 0 200 400 600 800 0 5 0 100 15 0 amb ient temp erature [ ] power dissipation [mw] . 0 200 400 600 800 050100150 amb ient temp erature [ ] power dissip ation [mw] . 0 1 2 3 4 5 6 123456 supp ly v oltage [v] output voltage high [v] -40 25 85 bu7271 family 105 5.5v 1.8v 3.0v bu7271 famil y -40 25 85 105 bu7271 family 0 2 4 6 8 10 12 14 16 -60-300 306090120 ambient temperature [ ] supply current [ a] 1.8v 5.5v 3.0v bu7271 famil y -40 25 85 105 bu7271 famil y 0 1 2 3 4 5 6 -60 -30 0 30 60 90 120 ambient temperature [ ] output voltag e high [v ] 1.8v 5.5v 3.0v bu7271 famil y 0 5 10 15 20 -60-30 0 30 60 90120 ambient temperature [ ] o utput vo ltage low [mv] 1.8v 5.5v 3.0v bu7271 famil y -40 25 85 105 bu7271 family bu7271g 85 bu7271 famil y 105 bu7271 famil y bu7271sg 1.8v 5.5v 3.0v bu7271 family -40 25 85 105 bu7271 famil y fig.24 fig.25 fig.26 fig.27 fig.28 fig.29 fig.30 fig.31 fig.32 fig.33 fig.34 fig.35 derating curve derating curve output sink current ? ambient temperature (vout=vss+0.4[v]) output sink current ? output voltage (vdd=3[v]) output voltage low ? supply voltage (rl=10[k ? ]) supply current ? ambient temperature output voltage high ? supply voltage (rl=10[k ? ]) output voltage high ? ambient temperature (rl=10[k ? ]) output voltage low ? ambient temperature (rl=10[k ? ]) output source current ? output voltage (vdd=3[v]) supply current ? supply voltage
technical note 10/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv 60 80 100 120 140 160 -60-30 0 30 60 90120 ambient temperature [ ] l arge s ignal v oltag e gai n [db] -10.0 -7.5 -5.0 -2.5 0.0 2.5 5.0 7.5 10.0 -60 -30 0 30 60 90 120 ambient temperature [ ] input offs et vol tage [ mv ] 0 20 40 60 80 100 1. e+ 00 1.e+01 1 .e+02 1.e+ 03 1.e+04 1.e+05 1.e+06 frequency [hz] gai n[d b] 0 50 10 0 15 0 20 0 phas e [d eg] 0 20 40 60 80 100 120 123456 suppl y vol tage [v] common mode rejection ratio [db] 60 80 10 0 12 0 14 0 16 0 1234 56 supp ly v oltage [v] large signal volta ge ga in [db ] 0 20 40 60 80 100 120 140 -60-30 0 306090120 ambient temperature [ ] p owe r s up ply re ject i on rat i o [db ] 0 20 40 60 80 100 120 -60-30 0 306090120 ambie nt temperature [ ] common mode rejection ratio [db] 0 10 20 30 40 50 60 70 80 -60-30 0 30 60 90120 amb ient temp erature [ ] sl ew ra te l-h [v/ ms] 0 10 20 30 40 50 60 70 80 -6 0 -3 0 0 30 60 9 0 1 20 ambient temperature [ ] slew rate h-l [v/ms] -10.0 -7 .5 -5 .0 -2 .5 0.0 2.5 5.0 7.5 10 .0 123456 s upp ly v oltag e [v] input offset v oltage [mv] -1 5 -1 0 -5 0 5 10 15 -101234 input volta ge [v ] input offset voltage [mv] bu7271 family (*)the above data is ability value of sample, it is not guaranteed. bu7271g: -40[ ] ~ +85[ ] bu7271sg: -40[ ] ~ +105[ ] -40 25 85 105 bu7271 famil y -40 25 85 105 bu7271 famil y bu7271 family 5.5v 1.8v 3.0v bu7271 famil y 5.5v 1.8v 3.0v bu7271 famil y 5.5v 1.8v 3.0v bu7271 famil y phase gain voltage gain frequency bu7271 family -40 25 85 105 bu7271 famil y 5.5v 1.8v 3.0v bu7271 famil y bu7271 famil y 5.5v 1.8v 3.0v -40 25 85 105 bu7271 famil y fig.36 fig.37 fig.38 fig.39 fig.40 fig.41 fig.42 fig.43 fig.44 fig.45 fig.46 common mode rejection ratio ? supply voltage (vdd=3[v]) slew rate l-h ? ambient temperature slew rate h-l ? ambient temperatu r e input offset voltage ? supply voltage (vicm=vdd, vout=0.1[v]) input offset voltage ? ambient temperature (vicm=vdd, vout=1.5[v]) input offset voltage ? input voltage (vdd=3[v]) large signal voltage gain ? supply voltage large signal voltage gain ? ambient temperature power supply rejection ratio ? ambient temperature common mode rejection ratio ? ambient temperature
technical note 11/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv 0 2 4 6 8 10 -60-30 0 306090120 ambient temperature [ ] output source current [ma] 0 10 20 30 40 123456 suppl y vol tage [v] output voltage low [mv] 0 2 4 6 8 10 12 14 16 18 20 -60-30 0 30 60 90120 a mbi ent temp era ture [ ] output sink current [ma] 0 5 10 15 20 0.0 0.5 1.0 1.5 2.0 2.5 3.0 o utput vo ltage [v] output sink current [ma] output source current ? ambient temperature (vout=vdd-0.4[v]) bu7205 family (*)the above data is ability value of sample , it is not guaranteed. bu7205hfv: -40[ ] ~ +85[ ] bu7205shfv: -40[ ] ~ +105[ ] 0 200 400 600 800 0 5 0 100 15 0 amb ient temp erature [ ] power dissip ation [mw] . 0 2 4 6 8 10 0.00.51.01.52.02.5 3.0 output vol ta ge [ v] ou tp ut sou r ce cu r re nt [m a] 0 0.2 0.4 0.6 0.8 123456 supp ly v oltage [v] supply current [ a] 0 200 400 600 800 0 5 0 100 15 0 amb ient temp erature [ ] power dissip ation [mw] . 0 1 2 3 4 5 6 123456 supp ly v oltage [v] output vol tage high [ v] -40 25 85 bu7205 family 105 5.5v 1.8v 3.0v bu7205 famil y -40 25 85 105 bu7205 family 0 0. 2 0. 4 0. 6 0. 8 -60 -30 0 30 60 90 120 ambient temperature [ ] supply current [ a] 1.8v 5.5v 3.0v bu7205 famil y -40 25 85 105 bu7205 famil y 0 1 2 3 4 5 6 -60 -30 0 30 60 90 120 ambient temperature [ ] output voltag e high [v ] 1.8v 5.5v 3.0v bu705 famil y 0 10 20 30 40 -60-30 0 30 60 90120 ambie nt te mpe rature [ ] o utput vo ltage low [mv] 1.8v 5.5v 3.0v bu7205 famil y -40 25 85 105 bu7205 famil y bu7205hfv 85 bu7205 famil y 105 bu7205 famil y 1.8v 5.5v 3.0v bu7205 family -40 25 85 105 bu7205 family fig.47 fig.48 fig.49 fig.50 fig.51 fig.52 fig.53 fig.54 fig.55 fig.56 fig.57 fig.58 bu7205shfv derating curve derating curve output sink current ? ambient temperature (vout=vss+0.4[v]) output sink current ? output voltage (vdd=3[v]) output voltage low ? supply voltage (rl=10[k ? ]) supply current ? ambient temperature output voltage high ? supply voltage (rl=10[k ? ]) output voltage high ? ambient temperature (rl=10[k ? ]) output voltage low ? ambient temperature (rl=10[k ? ]) output source current ? output voltage (vdd=3[v]) supply current ? supply voltage
technical note 12/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv 60 80 100 120 140 160 - 60 -30 0 30 60 90 120 ambie nt temperature [ ] l arge s ignal v oltag e gai n [db] -1 0.0 -7.5 -5.0 -2.5 0.0 2.5 5.0 7.5 10.0 -60 -30 0 30 60 90 120 ambient temperature [ ] inp ut o ffs et vol tage [ mv] 0 20 40 60 80 100 1. e+ 00 1.e+01 1 .e+02 1.e+ 03 1.e+04 1.e+05 1.e+06 frequency [hz] gai n[db] 0 50 10 0 15 0 20 0 phas e [d eg] 0 20 40 60 80 100 120 123456 supply vol ta ge [ v] common mode rejection ratio [db] 60 80 10 0 12 0 14 0 16 0 123 456 s up ply volta ge [v ] large signal volta ge ga in [db ] 0 20 40 60 80 100 120 140 -60-30 0 306090120 ambient temperature [ ] p owe r s up ply re ject i on rat i o [db ] 0 20 40 60 80 100 120 -60-30 0 306090120 ambie nt te mpe rature [ ] com m on mod e r eje ct ion r at io [db ] 0 1 2 3 4 5 -60-30 0 306090120 amb ient temp erature [ ] sl ew ra te l-h [v/ ms] 0 1 2 3 4 5 -60-30 0 306090120 amb ient temp erature [ ] sl ew rate h-l [v/ms] -10.0 -7 .5 -5 .0 -2 .5 0.0 2.5 5.0 7.5 10 .0 123456 s upp ly v oltag e [v] input offset v oltage [mv] -15 -10 -5 0 5 10 15 -10 123 4 input vol tage [ v] input offset v oltage [mv] bu7205 family (*)the above data is ability value of sample , it is not guaranteed. bu7205hfv: -40[ ] ~ +85[ ] bu7205shfv: -40[ ] ~ +105[ ] -40 25 85 105 bu7205 family 40 25 85 105 bu7205 family bu7205 famil y 5.5v 1.8v 3.0v bu7205 family 5.5v 1.8v 3.0v bu7205 family 5.5v 1.8v 3.0v bu7205 famil y phase gain bu7205 family -40 25 85 105 bu7205 famil y 5.5v 1.8v 3.0v bu7205 family bu7205 family 5.5v 1.8v 3.0v -40 25 85 105 bu7205 famil y fig.59 fig.60 fig.61 fig.62 fig.63 fig.64 fig.65 fig.66 fig.67 fig.68 fig.69 input offset voltage ? supply voltage (vicm=vdd, vout=1.5[v]) input offset voltage ? ambient temperature (vicm=vdd, vout=1.5[v]) input offset voltage ? input voltage (vdd=3[v]) large signal voltage gain ? ambient temperature common mode rejection ratio ? supply voltage common mode rejection ratio ? ambient temperature power supply rejection ratio ? ambient temperature slew rate l-h ? ambient temperature slew rate h-l ? ambient temperature voltage gain ? frequency large signal voltage gain ? supply voltage
technical note 13/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv 0 5 10 15 20 -60 -30 0 3 0 60 9 0 120 ambient temperature [ ] output source current [ma] 0 5 10 15 20 12 34 5 6 supply vol ta ge [ v] output voltage low [mv] 0 5 10 15 20 25 30 35 40 -60-30 0 30 60 90120 a mbi ent temp era ture [ ] output sink current [ma] 0 5 10 15 20 25 30 35 40 0.00.51.01.52.02.53.0 output vo ltage [v] output sink current [ma] output source current ?ambient temperature (vout=vdd-0.4[v]) bu7245 family (*)the above data is ability value of sample , it is not guaranteed. BU7245HFV: -40[ ] ~ +85[ ] bu7245shfv: -40[ ] ~ +105[ ] 0 200 400 600 800 0 5 0 100 15 0 amb ient temp erature [ ] power dissip ation [mw] . 0 5 10 15 20 0.00.51.01.52.02.53.0 output volta ge [v ] ou tp ut sou r ce cu r re nt [m a] 0 2 4 6 8 10 12 14 16 123456 supp ly v oltage [v] supply current [ a] 0 200 400 600 800 0 5 0 100 15 0 amb ient temp erature [ ] power dissip ation [mw] . 0 1 2 3 4 5 6 123456 supp ly v oltage [v] output vol tage high [ v] -40 25 85 bu7245 family 105 5.5v 1.8v 3.0v bu7245 famil y -40 25 85 105 bu7245 family 0 2 4 6 8 10 12 14 16 -60-300 306090120 ambient temperature [ ] supply current [ a] 1.8v 5.5v 3.0v bu7245 famil y -40 25 85 105 bu7245 famil y 0 1 2 3 4 5 6 -60 -30 0 30 60 90 120 ambient temperature [ ] output voltag e high [v ] 1.8v 5.5v 3.0v bu7245 famil y 0 5 10 15 20 -60-30 0 30 60 90120 ambie nt te mpe rature [ ] o utput vo ltage low [mv] 1.8v 5.5v 3.0v bu7245 famil y -40 25 85 105 bu7245 family BU7245HFV 85 bu7245 famil y 105 bu7245 famil y bu7245shfv 1.8v 5.5v 3.0v bu7245 family -40 25 85 105 bu7245 famil y fig.70 fig.71 fig.72 fig.73 fig.74 fig.75 fig.76 fig.77 fig.78 fig.79 fig.80 fig.81 derating curve derating curve output sink current ? ambient temperature (vout=vss+0.4[v]) output sink current ? output voltage (vdd=3[v]) output voltage low ? supply voltage (rl=10[k ? ]) supply current ? ambient temperature output voltage high ? supply voltage (rl=10[k ? ]) output voltage high ? ambient temperature (rl=10[k ? ]) output voltage low ? ambient temperature (rl=10[k ? ]) output source current ? output voltage (vdd=3[v]) supply current ? supply voltage
technical note 14/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv 60 80 100 120 140 160 -60 -30 0 30 60 90 120 ambie nt temperature [ ] l arge s ignal v oltag e gai n [db] -1 0.0 -7.5 -5.0 -2.5 0.0 2.5 5.0 7.5 10.0 -60-30 0 306090120 amb ient temperature [ ] inp ut o ffs et vol tage [ mv] 0 20 40 60 80 100 1.e+00 1.e+01 1. e+02 1.e+ 03 1.e+04 1.e+05 1.e+06 frequency [hz] gain[d b] 0 50 10 0 15 0 20 0 phas e [d eg] 0 20 40 60 80 100 120 123456 supply vol ta ge [ v] common mode rejection ratio [db] 60 80 100 120 140 160 12345 6 supp ly v oltage [v] l arge s ignal voltag e gai n [db] 0 20 40 60 80 100 120 140 -60-30 0 306090120 ambient temperature [ ] p owe r s up ply re ject i on rat i o [db ] 0 20 40 60 80 100 120 -60-30 0 306090120 ambient temperature [ ] common mode rejection ratio [db] 0 10 20 30 40 50 60 70 80 -60-30 0 30 60 90120 amb ient temp era ture [ ] sl ew ra te l-h [v/ ms] 0 10 20 30 40 50 60 70 80 -60 -30 0 30 60 90 120 ambient temperature [ ] sl ew rate h-l [v/ms] -10.0 -7 .5 -5 .0 -2 .5 0.0 2.5 5.0 7.5 10 .0 123456 s upp ly v oltag e [v] input offset v oltage [mv] -15 -10 -5 0 5 10 15 -101234 input vol tage [v] input offset voltag e [mv] bu7245 family (*)the above data is ability value of sample , it is not guaranteed. BU7245HFV: -40[ ] ~ +85[ ] bu7245shfv: -40[ ] ~ +105[ ] fig.91 fig.92 -40 25 85 105 bu7245 famil y -40 25 85 105 bu7245 family bu7245 famil y 5.5v 1.8v 3.0v bu7245 famil y 5.5v 1.8v 3.0v bu7245 famil y 5.5v 1.8v 3.0v bu7245 famil y phase gain bu7245 family -40 25 85 105 bu7245 famil y 5.5v 1.8v 3.0v bu7245 famil y bu7245 famil y 5.5v 1.8v 3.0v -40 25 85 105 bu7245 famil y fig.82 fig.83 fig.84 fig.85 fig.86 fig.87 fig.88 fig.89 fig.90 input offset voltage ? supply voltage (vicm=vdd, vout=1.5[v]) input offset voltage ? ambient temperature (vicm=vdd, vout=1.5[v]) input offset voltage ? input voltage (vdd=3[v]) large signal voltage gain ? ambient temperature common mode rejection ratio ? supply voltage common mode rejection ratio ? ambient temperature power supply rejection ratio ? ambient temperature slew rate l-h ? ambient temperature slew rate h-l ? ambient temperature gain ? frequency large signal voltage gain ? supply voltage
technical note 15/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv 0 2 4 6 8 10 -60-30 0 306090120 ambie nt temperature [ ] output source current [ma] 0 5 10 15 20 123456 suppl y vol tage [v] output voltage low [mv] 0 5 10 15 20 -60-30 0 30 60 90120 a mbi ent temp era ture [ ] output sink current [ma] 0 5 10 15 20 0.00.51.01.52.02.53.0 output vo ltage [v] output sink current [ma] output source current ?ambient temperature (vout=vdd-0.4[v]) bu7411 family (*)the above data is ability value of sample, it is not guaranteed. bu7411g: -40[ ] ~ +85[ ] bu7411sg: -40[ ] ~ +105[ ] 0 200 400 600 800 0 5 0 100 15 0 amb ient temp erature [ ] power dissip ation [mw] . 0 2 4 6 8 10 0.00.51.01.52.02.53.0 output volta ge [v ] output source current [ma] 0 0.2 0.4 0.6 0.8 123456 s upp ly v oltag e [v] supply current [ a] 0 200 400 600 800 0 5 0 100 15 0 amb ient temp erature [ ] power dissip ation [mw] . 0 1 2 3 4 5 6 123456 supp ly v oltage [v] output vol tage high [ v] -40 25 85 bu7411 famil y 105 5.5v 1.8v 3.0v bu7411 famil y -40 25 85 105 bu7411 family 0 0. 2 0. 4 0. 6 0. 8 -60-30 0 306090120 ambie nt te mpe rature [ ] supply current [ a] 1.6v 5.5v 3.0v bu7411 famil y -40 25 85 105 bu7411 famil y 0 1 2 3 4 5 6 -60 -30 0 30 60 90 120 ambient temperature [ ] output voltag e high [v ] 1.6v 5.5v 3.0v bu7411 famil y 0 5 10 15 20 -60-30 0 30 60 90120 ambie nt te mpe rature [ ] o utput vo ltage low [mv] 1.8v 5.5v 3.0v bu7411 famil y -40 25 85 105 bu7411 family bu7411g 85 bu7411 famil y 105 bu7411 famil y bu7411sg 1.6v 5.5v 3.0v bu7411 family -40 25 85 105 bu7411 family fig.93 fig.94 fig.95 fig.96 fig.97 fig.98 fig.99 fig.100 fig.101 fig.102 fig.103 fig.104 derating curve derating curve output sink current ? ambient temperature (vout=vss+0.4[v]) output sink current ? output voltage (vdd=3[v]) output voltage low ? supply voltage (rl=10[k ? ]) supply current ? ambient temperature output voltage high ? supply voltage (rl=10[k ? ]) output voltage high ? ambient temperature (rl=10[k ? ]) output voltage low ? ambient temperature (rl=10[k ? ]) output source current ? output voltage (vdd=3[v]) supply current ? supply voltage
technical note 16/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv 60 80 100 120 140 160 -60 -30 0 30 60 90 120 ambie nt temperature [ ] l arge s ignal v oltag e gai n [db] -1 0.0 -7.5 -5.0 -2.5 0.0 2.5 5.0 7.5 10.0 -60-30 0 306090120 amb ient temperature [ ] inp ut o ffs et vol tage [ mv] 0 20 40 60 80 100 1. e+ 00 1.e+01 1 .e+02 1.e+ 03 1.e+04 1.e+05 1.e+06 frequency [hz] gai n[d b] 0 50 10 0 15 0 20 0 phas e [d eg] 0 20 40 60 80 100 120 123456 suppl y vol tage [ v] common mode rejection ratio [db] 60 80 100 120 140 160 123 456 s up ply voltag e [v ] large s ignal voltag e ga in [db] 0 20 40 60 80 100 120 140 -60-30 0 306090120 ambient temperature [ ] p owe r s up ply re ject i on rat i o [db ] 0 20 40 60 80 100 120 -60-30 0 306090120 ambient temperature [ ] common mode rejection ratio [db] 0 1 2 3 4 5 -60 -30 0 30 60 90 120 amb ient temp erature [ ] slew rate l-h [v/ms] 0 1 2 3 4 5 -60-30 0 306090120 ambient temperature [ ] slew ra te h-l [v/ms] -10.0 -7 .5 -5 .0 -2 .5 0.0 2.5 5.0 7.5 10 .0 123456 s upp ly v oltag e [v] input offset v oltage [mv] -15 -10 -5 0 5 10 15 -10123 input vol tage [v] input offset voltag e [mv] bu7411 family (*)the above data is ability value of sample, it is not guaranteed. bu7411g: -40[ ] ~ +85[ ] bu7411sg: -40[ ] ~ +105[ ] fig.114 fig.115 -40 25 85 105 bu7411 famil y -40 25 85 105 bu7411 famil y bu7411 famil y 5.5v 1.6v 3.0v bu7411 famil y 5.5v 1.6v 3.0v bu7411 famil y 5.5v 1.6v 3.0v bu7411 famil y phase gain bu7411 family -40 25 85 105 bu7411 famil y 5.5v 1.6v 3.0v bu7411 famil y bu7411 family 5.5v 1.6v 3.0v -40 25 85 105 bu7411 famil y fig.105 fig.106 fig.107 fig.108 fig.109 fig.110 fig.111 fig.112 fig.113 input offset voltage ? supply voltage (vicm=vdd-1.2[v], vout=1.5[v]) input offset voltage ? ambient temperature (vicm=vdd-1.2[v], vout=1.5[v]) input offset voltage ? input voltage (vdd=3[v]) large signal voltage gain ? ambient temperature common mode rejection ratio ? supply voltage common mode rejection ratio ? ambient temperature power supply rejection ratio ? ambient temperature slew rate l-h ? ambient temperature slew rate h-l ? ambient temperature voltage gain ? frequency large signal voltage gain ? supply voltage
technical note 17/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv 0 5 10 15 20 -60-30 0 306090120 ambie nt temperature [ ] output source current [ma] 0 5 10 15 20 123456 supply vol ta ge [ v] output voltage low [mv] 0 10 20 30 40 -60-30 0 30 60 90120 a mbi ent temp era ture [ ] output sink current [ma] 0 5 10 15 20 25 30 35 40 0.00.51.01.52.02.53.0 output vo ltage [v] output sink current [ma] output source current ?ambient temperature (vout=vdd-0.4[v]) bu7421 family (*)the above data is ability value of sample, it is not guaranteed. bu7421g: -40[ ] ~ +85[ ] bu7421sg: -40[ ] ~ +105[ ]] 0 200 400 600 800 0 5 0 100 15 0 amb ient temp erature [ ] power dissip ation [mw] . 0 5 10 15 20 0. 0 0 .5 1. 0 1 .5 2. 0 2 .5 3. 0 output volta ge [v ] output source current [ma] 0 2 4 6 8 10 12 14 16 123456 supp ly v oltage [v] supply current [ a] 0 200 400 600 800 0 5 0 100 15 0 amb ient temp erature [ ] power dissip ation [mw] . 0 1 2 3 4 5 6 123456 supp ly v oltage [v] output vol tage high [ v] -40 25 85 bu7421 family 105 5.5v 1.7v 3.0v bu7421 famil y -40 25 85 105 bu7421 famil y 0 2 4 6 8 10 12 14 16 -60 - 30 0 30 60 90 120 am bi e nt tem p era ture [ ] supply current [ a] 1.7v 5.5v 3.0v bu7421 famil y -40 25 85 105 bu7421 famil y 0 1 2 3 4 5 6 -60 -30 0 30 60 90 120 ambient temperature [ ] output voltag e high [v ] 1.7v 5.5v 3.0v bu7421 famil y 0 5 10 15 20 -60-30 0 30 60 90120 ambie nt te mpe rature [ ] o utput vo ltage low [mv] 1.7v 5.5v 3.0v bu7421 famil y -40 25 85 105 bu7421 family bu7421g 85 bu7421 famil y 105 bu7421 famil y bu7421sg 1.7v 5.5v 3.0v bu7421 family -40 25 85 105 bu7421 family fig.116 fig.117 fig.118 fig.119 fig.120 fig.121 fig.122 fig.123 fig.124 fig.125 fig.126 fig.127 derating curve derating curve output sink current ? ambient temperature (vout=vss+0.4[v]) output sink current ? output voltage (vdd=3[v]) output voltage low ? supply voltage (rl=10[k ? ]) supply current ? ambient temperature output voltage high ? supply voltage (rl=10[k ? ]) output voltage high ? ambient temperature (rl=10[k ? ]) output voltage low ? ambient temperature (rl=10[k ? ]) output source current ? output voltage (vdd=3[v]) supply current ? supply voltage
technical note 18/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv 60 80 100 120 140 160 -60 -30 0 30 60 90 120 ambie nt temperature [ ] l arge s ignal v oltag e gai n [db] -10.0 -7.5 -5.0 -2.5 0.0 2.5 5.0 7.5 10.0 -60 -30 0 30 60 90 120 ambient temperature [ ] input offs et vol tage [ mv ] 0 20 40 60 80 100 1.e+00 1.e+01 1. e+02 1. e+ 03 1. e+04 1.e+05 1.e+06 frequency [hz] gai n[db] 0 50 100 150 200 phase [deg] 0 20 40 60 80 100 120 123456 suppl y vol tage [ v] common mode rejection ratio [db] 60 80 100 120 140 160 123 456 supply voltage [v] large s ignal voltag e ga in [db] 60 80 100 120 140 -60-30 0 306090120 ambient temperature [ ] p owe r s up ply re ject i on rat i o [db ] 0 20 40 60 80 100 120 -60-30 0 306090120 ambient temperature [ ] common mode rejection ratio [db] 0 10 20 30 40 50 60 70 80 -60-30 0 30 60 90120 amb ient temp erature [ ] slew rate l-h [v/ms] 0 10 20 30 40 50 60 70 80 -60 -30 0 30 60 90 120 ambient temperature [ ] sl ew ra te h-l [v/ms] -10.0 -7 .5 -5 .0 -2 .5 0.0 2.5 5.0 7.5 10 .0 123456 supp ly v oltage [v] input offset v oltage [mv] -15 -10 -5 0 5 10 15 -10123 input vol tage [ v] input offset v oltage [mv] bu7421 family (*)the above data is ability value of sample, it is not guaranteed. bu7421g: -40[ ] ~ +85[ ] bu7421sg: -40[ ] ~ +105[ ] fig.137 fig.138 -40 25 85 105 bu7421 family -40 25 85 105 bu7421 famil y bu7421 family 5.5v 1.7v 3.0v bu7421 famil y 5.5v 1.7v 3.0v bu7421 famil y 5.5v 1.7v 3.0v bu7421 famil y phase gain bu7421 family -40 25 85 105 bu7421 famil y 5.5v 1.7v 3.0v bu7421 famil y bu7421 family 5.5v 1.7v 3.0v -40 25 85 105 bu7421 family fig.128 fig.129 fig.130 fig.131 fig.132 fig.133 fig.134 fig.135 fig.136 input offset voltage ? supply voltage (vicm=vdd-1.2[v], vout=1.5[v]) input offset voltage ? ambient temperature (vicm=vdd-1.2[v], vout=1.5[v]) input offset voltage ? input voltage (vdd=3[v]) large signal voltage gain ? ambient temperature common mode rejection ratio ? supply voltage common mode rejection ratio ? ambient temperature power supply rejection ratio ? ambient temperature slew rate l-h ? ambient temperature slew rate h-l ? ambient temperature voltage gain ? frequency large signal voltage gain ? supply voltage
technical note 19/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv 0 5 10 15 20 -60-30 0 306090120 ambie nt temperature [ ] output source current [ma] 0 5 10 15 20 123456 supply vol ta ge [ v] output voltage low [mv] 0 10 20 30 40 -60-30 0 30 60 90120 a mbi ent temp era ture [ ] output sink current [ma] 0 10 20 30 40 50 60 70 80 0.0 0.5 1.0 1.5 2.0 2.5 3.0 o utput vo ltage [v] output sink current [ma] output source current ?ambient temperature (vout=vdd-0.4[v]) bu7475 family (*)the above data is ability value of sample , it is not guaranteed. bu7475hfv: -40[ ] ~ +85[ ] bu7475shfv: -40[ ] ~ +105[ ] 0 200 400 600 800 0 5 0 100 15 0 amb ient temp erature [ ] power dissip ation [mw] . 0 10 20 30 40 0.00.51.01.52.02.53.0 output volta ge [v ] ou tp ut sou r ce cu r re nt [m a] 0 2 4 6 8 10 12 14 16 123456 su p p ly vo lta ge [ v] supply current [ a] 0 200 400 600 800 0 5 0 100 15 0 amb ient temp erature [ ] power dissip ation [mw] . 0 1 2 3 4 5 6 123456 supp ly v oltage [v] output vol tage high [ v] -40 25 85 bu7475 family 105 5.5v 1.7v 3.0v bu7475 famil y -40 25 85 105 bu7475 family 0 2 4 6 8 10 12 14 16 -60-300 306090120 ambient temperature [ ] supply current [ a] 1.7v 5.5v 3.0v bu7475 famil y -40 25 85 105 bu7475 famil y 0 1 2 3 4 5 6 -60 -30 0 30 60 90 120 ambient temperature [ ] output voltag e high [v ] 1.7v 5.5v 3.0v bu7475 famil y 0 5 10 15 20 -60 -30 0 30 60 90 120 ambie nt temperature [ ] o utput vo ltage low [mv] 1.7v 5.5v 3.0v bu7475 famil y -40 25 85 105 bu7475 family bu7475hfv 85 bu7475 famil y 105 bu7475 famil y bu7475shfv 1.7v 5.5v 3.0v bu7475 family -40 25 85 105 bu7475 family fig.139 fig.140 fig.141 fig.142 fig.143 fig.144 fig.145 fig.146 fig.147 fig.148 fig.149 fig.150 derating curve derating curve output sink current ? ambient temperature (vout=vss+0.4[v]) output sink current ? output voltage (vdd=3[v]) output voltage low ? supply voltage (rl=10[k ? ]) supply current ? ambient temperature output voltage high ? supply voltage (rl=10[k ? ]) output voltage high ? ambient temperature (rl=10[k ? ]) output voltage low ? ambient temperature (rl=10[k ? ]) output source current ? output voltage (vdd=3[v]) supply current ? supply voltage
technical note 20/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv 60 80 100 120 140 160 -60 -30 0 30 60 90 120 ambie nt temperature [ ] l arge s ignal v oltag e gai n [db] -1 0.0 -7.5 -5.0 -2.5 0.0 2.5 5.0 7.5 10.0 -60 -30 0 30 60 90 120 ambient temperature [ ] inp ut o ffs et vol tage [ mv] 0 20 40 60 80 100 1.e+00 1.e+01 1. e+02 1. e+ 03 1. e+04 1.e+05 1.e+06 frequency [hz] gai n[db] 0 50 100 150 200 phase [deg] 0 20 40 60 80 100 120 123456 suppl y vol tage [ v] common mode rejection ratio [db] 60 80 10 0 12 0 14 0 16 0 123 456 s up ply volta ge [v ] large signal volta ge ga in [db ] 0 20 40 60 80 100 120 140 -60-30 0 306090120 amb ient temp erature [ ] p owe r s up ply re jec ti on ra ti o [d b] 0 20 40 60 80 100 120 -60-30 0 306090120 ambie nt temperature [ ] common mode rejection ratio [db] 0 10 20 30 40 50 60 70 80 -60-30 0 306090120 amb ient temp era ture [ ] sl ew ra te l-h [v/ ms] 0 10 20 30 40 50 60 70 80 -60-30 0 306090120 ambie nt temperature [ ] sl ew ra te h-l [v/ ms] -10.0 -7 .5 -5 .0 -2 .5 0.0 2.5 5.0 7.5 10 .0 123456 s upp ly v oltag e [v] input offset v oltage [mv] -15 -10 -5 0 5 10 15 -10123 input vol tage [v] input offset voltag e [mv] bu7475 family (*)the above data is ability value of sample , it is not guaranteed. bu7475hfv: -40[ ] ~ +85[ ] bu7475shfv: -40[ ] ~ +105[ ] -40 25 85 105 bu7475 famil y -40 25 85 105 bu7475 famil y bu7475 family 5.5v 1.7v 3.0v bu7475 famil y 5.5v 1.7v 3.0v bu7475 famil y 5.5v 1.7v 3.0v bu7475 famil y phase gain bu7475 family -40 25 85 105 bu7475 famil y 5.5v 1.7v 3.0v bu7475 famil y bu7475 family 5.5v 1.7v 3.0v -40 25 85 105 bu7475 famil y fig.151 fig.152 fig.153 fig.154 fig.155 fig.156 fig.157 fig.158 fig.159 fig.160 fig.161 input offset voltage ? supply voltage (vicm=vdd-1.2[v], vout=1.5[v]) input offset voltage ? ambient temperature (vicm=vdd-1.2[v], vout=1.5[v]) input offset voltage ? input voltage (vdd=3[v]) large signal voltage gain ? ambient temperature common mode rejection ratio ? supply voltage common mode rejection ratio ? ambient temperature power supply rejection ratio ? ambient temperature slew rate l-h ? ambient temperature slew rate h-l ? ambient temperature voltage gain ? frequency large signal voltage gain ? supply voltage
technical note 21/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv vbias vbias class ab control vdd out in+ in- vss vdd in+ in- vss out class ab control vbias vbias input-output full swing bu7265/bu7271/bu7205/bu7245 family ground sense bu7411/bu7421/bu7475family psrr = 20log S vdd (1+rf /rs) |vf6-vf7| [db] av = 20log 2 (1+rf /rs) |vf2-vf3| [db] cmrr = 20log S vicm (1+rf /rs) |vf4-vf5| [db] schematic diagram fig.162 schematic diagram test circuit 1 null method vdd, vss, ek, vicm unit:[v] parameter vf s1 s2 s3 vdd vss ek vicm calculation bu7265 /bu7271 bu7205 /bu7245 bu7411 bu7421 /bu7475 input offset voltage vf1 on on off 3 0 -1.5 3 3 2 1.8 1 large signal voltage gain vf2 on on on 3 0 -0.5 1.5 1.5 1 0.9 2 vf3 -2.5 common-mode rejection ratio (input common-mode voltage range) vf4 on on off 3 0 -1.5 0 0 0 0 3 vf5 3 3 2 1.8 power supply rejection ratio vf6 bu7265/bu7271 on on off 1.8 0 -0.9 0 0 0 0 4 bu7205/bu7245 on on off 1.8 bu7421/bu7475 on on off 1.7 bu7411 on on off 1.6 vf7 on on off 5.5 calculation 1. input offset voltage (vio) 2. large signal voltage gain (av) 3 common-mode rejection ratio (cmrr) 4. power supply rejection ratio (psrr) fig.163 test circuit 1 vio = |vf1| 1+rf/rs [v] vf vdd rf=50[k ] ri=1[m ] 0.1[f] rs 50[ ] sw2 rl sw3 rk=500[k ] 0.01[f] ek 15v -15v null dut vss vrl 50[k ] vicm sw1 0.1[f] ri=1[m ] rs 50[ ] v 1000[pf] 0.1[f] rk=500[k ]
technical note 22/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv sw1 r1=1[k ? ] vdd=3[v] r2=100[k ? ] gnd a a v v sw2 sw3 sw4 sw5 sw6 sw7 sw8 sw9 sw10 sw11 sw12 vin+ vin- rl cl vo test circuit 2 switch condition sw no. sw 1 sw 2 sw 3 sw 4 sw 5 sw 6 sw 7 sw 8 sw 9 sw 10 sw 11 sw 12 supply current off off on off on off off off off off off off maximum output voltage (rl=10[k ? ]) off on off off on off off on off off on off output current off on off off on off off off off on off off slew rate off off on off off off on off on off off on maximum frequency on off off on on off off off on off off on fig.164 test circuit 2 fig.165 slew rate input output wave (input-output full swing bu7261/ bu7271/bu7205/bu7245 family) fig.166 slew rate input output wave (ground sense bu7411/bu7421/bu7475 family) t vin [v] 3[v p-p ] 3[v] 0[v] vout [v] sr = v / t
technical note 23/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv examples of circuit voltage follower inverting amplifier non-inverting amplifier fig.168 inverting amplifier circuit fig.169 non-inverting amplifier circuit voltage gain is 0 [db]. this circuit controls output voltage (vout) equal input voltage (vin), and keeps vout with stable because of high input impedance and low output impedance. vout is shown next formula. vout=vin for inverting amplifier, vin is amplified by voltage gain decided r1 and r2, and phase reversed voltage is outputed. vout is shown next formula. vout=-(r2/r1) ? vin input impedance is r1. for non-inverting amplifier, vin is amplified by voltage gain decided r1 and r2, and phase is same with vin. vout is shown next formula. vout=(1+r2/r1) ? vin this circuit realizes high input impedance because input impedance is operational amplifier?s input impedance. fig.167 voltage follower circuit vss vout vin vdd r2 r1 vss r1//r2 vin vout vdd vss r2 vdd vin vout r1
technical note 24/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv examples of circuit adder circuit differential amplifier fig.171 differential amplifier fig.170 adder circuit a dder circuit output the vo ltage that added up input voltage. a phase of the output voltage turns orver, because non-inverting circuit is used. vout is shown next formula. vout = -r3(vin1/r1+vin2/r2) when three input voltage is as above, it connects with input through resistance like r1 and r2. differential amplifier output the voltage that amplified a difference of input voltage. in the case of r1=r3=ra r2=r4=rb vout is shown next formula. vout = -rb/ra(vin1-vin2) r3 r1 vdd vss r2 vout vin1 vin2 r2 r1 vdd vss r3 vout vin1 vin2 r4
technical note 25/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv description of electr ical characteristics described here are the terms of electric characteristics used in this technical note. items and symbols used are also shown. note that item name and symbol and t heir meaning may differ from those on an other manufacture?s document or general document. 1. absolute maximum ratings absolute maximum rating item indicates the condition which mu st not be exceeded. application of voltage in excess of absolute maximum rating or use out of absolute maximum ra ted temperature environment may cause deterioration of characteristics 1.1 power supply voltage (vdd/vss) without deterioration or destruction of characteristics of internal circuit. 1.2 differential input voltage (vid) indicates the maximum voltage that can be applied between non-inverting terminal and inverting terminal without deterioration and destruction of characteristics of ic. 1.3 input common-mode voltage range (vicm) indicates the maximum voltage that can be applied to no n-inverting terminal and inverting terminal without deterioration or destruction of characte ristics. input common-mode voltage range of the maximum ratings not assure normal operation of ic. when normal operation of ic is de sired, the input common-mode voltage of characteristics item must be followed. 1.4 power dissipation (pd) indicates the power that can be consumed by spec ified mounted board at t he ambient temperature 25 (normal temperature). as for package product, pd is determined by t he temperature that can be permitted by ic chip in the package (maximum junction temperature) and thermal resistance of the package. 2. electrical characteristics item 2.1 input offset voltage (vio) indicates the voltage difference between non-inverting termi nal and inverting terminal. it can be translated into the input voltage difference required for setting the output voltage at 0 [v]. 2.2 input offset current (iio) indicates the difference of input bias current bet ween non-inverting terminal and inverting terminal. 2.3 input bias current (ib) indicates the current that flows into or out of the input terminal. it is defined by the average of input bias current at non-inverting terminal and input bias current at inverting terminal. 2.4 circuit current (idd) indicates the ic current that flows under specified conditions and no-load steady status. 2.5 high level output voltage / low level output voltage (vom) indicates the voltage range that can be output by the ic und er specified load condition. it is typically divided into high-level output voltage and low-level output voltage. high -level output voltage indicates the upper limit of output voltage. low-level output voltage indicates the lower limit. 2.6 large signal voltage gain (av) indicates the amplifying rate (gain) of output voltage a gainst the voltage difference between non-inverting terminal and inverting terminal. it is normally the amplifying rate (gain) with reference to dc voltage. av = (output voltage fluctuation) / (input offset fluctuation) 2.7 input common-mode voltage range (vicm) indicates the input voltage range where ic operates normally. 2.8 common-mode rejection ratio (cmrr) indicates the ratio of fluctuation of in put offset voltage when in-phase input voltage is changed. it is normally the fluctuation of dc. cmrr = (change of input common-mode vo ltage)/(input offset fluctuation) 2.9 power supply rejection ratio (psrr) indicates the ratio of fluctuation of input offset voltage when supply voltage is changed. it is normally the fluctuation of dc . psrr = (change of power supply volt age)/(input offset fluctuation) 2.10 channel separation (cs) indicates the fluctuation of input offset voltage or that of output vo ltage with reference to the change of output voltage of driven channel. 2.11 slew rate (sr) indicates the time fluctuation ratio of volt age output when step input signal is applied. 2.12 unity gain frequency (ft) indicates a frequency where the voltage gain of op-amp is 1. 2.13 total harmonic distortion + noise (thd+n) indicates the fluctuation of input offset volt age or that of output vo ltage with reference to the change of output voltage of driven channel. 2.14 input referred noise voltage (vn) indicates a noise voltage generated inside the operational amplifier equivalent by ideal voltage source connected in series with input terminal.
technical note 26/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv 0 200 400 600 800 1000 0 50 100 150 ambient temperature[ ] pow er dissipation [m w ] 105 540[mw] 0 200 400 600 800 1000 0 50 100 150 ambient temperature[ ] pow er dissipation [m w ] 85 540[mw] 0 200 400 600 800 1000 0 50 100 150 ambient temperature[ ] pow er dissipation [m w ] 535[mw] 105 0 200 400 600 800 1000 0 50 100 150 ambient temperature[ ] pow er dissipation [m w ] 535[mw] 85 0 a mbient temperature ta [ ] p2 p1 25 125 75 100 50 [w] pd(max) tj(max) ja2 ja1 ja2 < ja1 ( b ) deratin g curve derating curve power dissipation (total loss) indicates the power that can be consumed by ic at ta=25 (normal temperature).ic is heated when it consumed power, and the temperature of ic ship bec omes higher than ambient temper ature. the temperature that can be accepted by ic chip depends on circuit configurati on, manufacturing process, and consumable power is limited. power dissipation is determined by the temperature allowed in ic chip (maximum junction temper ature) and thermal resistance of package (heat dissipation capability). the maximum junction temperature is typically equal to the maximum value in the storage package (heat dissipation capability). the maximum junction temperature is typically equal to the maximum value in the storage temperature range. heat generated by consum ed power of ic radiates from the mold resin or lead frame of the package. the parameter which indicates this heat dissipation capability (hardness of heat release) is called thermal resistance, represented by the symbol j-a[ /w]. the temperature of ic inside the package c an be estimated by this thermal resistance. fig.172 (a) shows the model of thermal resi stance of the package. thermal resistance ja, ambient temperature ta, junction temperature tj, and power dissipation pd can be calculated by the equation below: ja = (tj ta) / pd [ /w] ????? ( ) derating curve in fig.172 (b) indicates power that can be consumed by ic with reference to ambient temperature. power that can be consumed by ic begins to attenuate at certain ambient temperature. this gradient is determined by thermal resistance ja. thermal resistance ja depends on chip size, power consumptio n, package, ambient te mperature, package condition, wind velocity, etc even when t he same of package is used. thermal reduction curve indicates a reference value measured at a specified condition. fi g.173(c)-(d) show a derating curve for an example of bu7265 / bu7205 / bu7271 / bu7245 / bu7411 / bu7421 / bu7475 family. (*23) (*24) unit 5.4 5.35 [mw/ ] when using the unit above ta=25[ ], subtract the value above per degree[ ]. permissible dissipation is the value when fr4 glass epoxy board 70[mm] 70[mm] 1.6[mm] (cooper foil area below 3[ ]) is mounted (c) bu7265g bu7271g bu7411g bu7421g bu7265g(*23) bu7271g(*23) bu7411g(*23) bu7421g(*23) (e) bu7265sg bu7271sg bu7411sg bu7421sg (d) bu7205hfv BU7245HFV bu7475hfv (f) bu7205shfv bu7245shfv bu7475shfv bu7205hfv(*24) BU7245HFV(*24) bu7475hfv(*24) bu7265sg(*23) bu7271sg(*23) bu7411sg(*23) bu7421sg(*23) bu7205shfv(*24) bu7245shfv(*24) bu7475shfv(*24) a mbient temperature ta ] chip surface temperature tj ] pd[w] ja = (tj \ ta ) / p d [ / w] package face temperature (a) thermal resistance ta [ ] power dissipation of ic fig.173 derating curve fig.172 thermal resistance and derating
technical note 27/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv notes for use 1) absolute maximum ratings absolute maximum ratings are the values which indicate the limits,within which the given voltage range can be safely charged to the terminal.however, it does not guarantee the circuit operation. 2) applied voltage to the input terminal for normal circuit operation of voltage comparator, please input voltage for its input terminal within input common mode voltage vdd+0.3[v]. then, regardless of power supply volt age,vss-0.3[v] can be applied to input terminals without deterioration or destruction of its characteristics. 3) operating power supply (split power supply/single power supply) the operational amplifier operates if a given level of voltage is applied between vdd and vss. therefor e, the operational amplifier can be operated under single power supply or split power supply. 4) power dissipation (pd) if the ic is used under excessive power dissipation. an incr ease in the chip temperature wi ll cause deterioration of the radical characteristics of ic. for example, reduction of cu rrent capability.take consideration of the effective power dissipation and thermal design with a sufficient margin. pd is reference to the provided power dissipation curve. 5) short circuits between pins and incorrect mounting short circuits between pins and incorrect mounting when mount ing the ic on a printed circui ts board, take notice of the direction and positioning of th e ic.if ic is mounted erroneously, it may be dama ged. also, when a foreign object is inserted between output, between output and vdd terminal or vss terminal which causes short circuit, the ic may be damaged. 6) output short circuit if short circuit occurs between the output terminal and vdd te rminal , excessive in output current may flow and generate heat , causing destruction of the ic.take due care. 7) using under strong electromagnetic field be careful when using the ic under strong elec tromagnetic field because it may malfunction. 8) usage of ic when stress is applied to the ic through warp of the printed circuit board, the characteristics may fluctuate due to the piezo effect. be careful of the warp of the printed circuit board. 9) testing ic on the set board when testing ic on the set board, in cases where the capaci tor is connected to the low impedance, make sure to discharge per fabrication because there is a possibility that ic may be damaged by stress.when removing ic from the set board, it is essential to cut supply volt age. as a countermeasure against the stat ic electricity, observe proper grounding during fabrication process and take due care when carrying and storage it. 10) the ic destruction caused by capacitive load the transistors in circuits may be damaged when vdd termi nal and vss terminal is shorted with the charged output terminal capacitor.when ic is used as a operational amplifier or as an application circuit, where oscillation is not activated by an output capacitor,the output capacitor must be kept below 0.1[ f] in order to prevent the damage mentioned above. 11) decupling capacitor insert the decupling capacitance between vdd and vss, for stable operation of operational amplifier. 12) latch up be careful of input voltage that exceed the vdd and vss. when cmos device have sometimes occur latch up operation. and protect the ic from abnormaly noise. 13) crossover distortion inverting amplifier generates crossover distortion when feed back resistance value is small. to suppress the crossover distortion, connect a resistor between the output terminal and vss then increse the bias current to enable class a output stage operation. fig.174 pull down resistance + - vdd pull down resistance vss
technical note 28/28 www.rohm.com 2010.12 - rev. a ? 2010 rohm co., ltd. all rights reserved. bu7265g,bu7265sg,bu7205hfv,bu7205shfv,bu7271g,bu7271sg,BU7245HFV,bu7245shfv, bu7411g,bu7411sg,bu7421g,bu7421sg,bu7475hfv,bu7475shfv ordering part number b u 7 2 6 5 s h f v - t r part no. bu part no. ? 7265 7265s ? 7411 7411s ? 7271 7271s ? 7421 7421s ? 7205 7205s ? 7475 7475s ? 7245 7245s package g :ssop5 hfv :hvsof5 packaging and forming specification tr: embossed tape and reel direction of feed reel ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape tape quantity direction of feed the direction is the 1pin of product is at the upper right when you hold reel on the left hand and you pull out the tape on the right hand 3000pcs tr () 1pin (unit : mm) ssop5 2.90.2 0.13 4 + 6 ?4 1.6 2.80.2 1.10.05 0.050.05 +0.2 ?0.1 +0.05 ?0.03 0.42 +0.05 ?0.04 0.95 5 4 12 3 1.25max. 0.2min. 0.1 s s direction of feed reel ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape tape quantity direction of feed the direction is the 1pin of product is at the upper right when you hold reel on the left hand and you pull out the tape on the right hand 3000pcs tr () 1pin (unit : mm) hvsof5 s 0.08 m 0.1 s 4 321 5 (0.05) 1.60.05 1.00.05 1.60.05 1.2 0.05 (max 1.28 include burr) 45 32 1 (0.8) (0.91) (0.3) (0.41) 0.2max 0.130.05 0.220.05 0.6max 0.5 0.02 +0.03 ?0.02
r1010 a www.rohm.com ? 2010 rohm co., ltd. all rights reserved. notice rohm customer support system http://www.rohm.com/contact/ thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact us. notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of rohm co.,ltd. the content specied herein is subject to change for improvement without notice. the content specied herein is for the purpose of introducing rohm's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specications, which can be obtained from rohm upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specied in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, rohm shall bear no responsibility for such damage. the technical information specied herein is intended only to show the typical functions of and examples of application circuits for the products. rohm does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by rohm and other parties. rohm shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specied in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, ofce-automation equipment, commu- nication devices, electronic appliances and amusement devices). the products specied in this document are not designed to be radiation tolerant. while rohm always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, re or any other damage caused in the event of the failure of any product, such as derating, redunda ncy, re control and fail-safe designs. rohm shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospac e machinery, nuclear-reactor controller, fuel- controller or other safety device). rohm shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specied herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law.

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